Montage Technology (澜起科技) makes the small chips that decide whether a server's main memory can keep up with HBM and GPUs.
The Shanghai company, founded in 2004, makes memory-interface and high-speed interconnect chips — the regulators, buffers, and controllers that sit between a CPU and its DRAM. As large-model (大模型) inference stretches context windows, that humble, easily overlooked job has become a serious and structural bandwidth bottleneck for inference servers.
Key takeaways
- Montage (澜起科技) listed on Shanghai's STAR Market in 2019 and added a Hong Kong listing (stock 6809) in February 2026.
- Its interconnect-chip line booked 5.139 billion RMB (≈ US$710M) in 2025 revenue, up 53.4% year on year.
- The DDR5 RCD (registering clock driver) keeps iterating: fifth-generation parts are in volume shipment, and a sixth-generation RCD at 9,200 MT/s was sampled in June 2026.
- MRCD/MDB — the logic chips inside MRDIMM high-bandwidth memory modules — run Gen1 at 8,800 MT/s and Gen2 at 12,800 MT/s; Montage says it is one of only two global suppliers of the Gen1 pair.
- CXL memory-expander (MXC) chips now reach PCIe 6.2 (64 GT/s) and CXL 3.2, targeting the capacity side of the AI memory wall.
Why the "memory wall" is Montage's market
A GPU's HBM is fast but tiny and expensive. For inference, a huge amount of data — KV caches, retrieved context, model lookup tables — wants to live in cheaper main memory attached to the CPU. The problem is bandwidth: ordinary DDR5 RDIMM stalls under the concurrent, high-frequency queries that sparse models like MoE generate. MRDIMM fixes this by multiplexing two ranks through an MRCD clock driver and ten MDB data buffers per module, roughly doubling effective data rate versus a standard module.
Montage's MRCD/MDB Gen2 hits 12,800 MT/s, about 45% above Gen1's 8,800 MT/s. The company says it is one of only two suppliers worldwide qualified to ship Gen1 MRCD/MDB, which is why this "incremental" product line is treated as the next growth battleground after the RCD generations everyone already ships.
From speed to capacity: the CXL bet
Bandwidth solves speed; capacity solves scale. CXL (Compute Express Link) lets a server pool memory across devices, so a CPU can address far more DRAM than its own sockets hold. Montage's latest MXC controller runs on a PCIe 6.2 physical layer (64 GT/s) with CXL 3.2 support and dual DDR5 channels up to 8,000 MT/s. In the company's own published testing, pairing MRDIMM and CXL memory pooling with a sparse-inference design lifted system throughput by over 45% versus local-only memory — a separate system-level measure from the per-module speed gain above — but those are the vendor's figures, not an independent benchmark.
Note the distinction from HBM: HBM is soldered next to the GPU as fast, costly cache, while MRDIMM and CXL address the server's main memory — the cheaper, larger pool the CPU manages. Interface chips sit between those two worlds, and because they are logic rather than leading-edge memory, they have proven easier for Chinese suppliers to localize ahead of the DRAM itself. That pattern — localizing the control and interface layer before the memory — is worth watching across the whole stack, because it is where pricing power and import substitution tend to arrive first.
The financial shape
The business is unusually profitable for a chipmaker. In the first half of 2026, the interconnect segment's gross margin reached 69.3%, up nearly 5 points year on year, and the four newest interconnect products — MRCD/MDB, PCIe Retimer, CKD, and CXL MXC — together earned 538 million RMB (≈ US$75M), up 80.7%. The flip side is customer concentration: Montage sells to memory-module makers that sit downstream of Samsung, SK hynix, Micron, and ChangXin Memory (长鑫), a concentration the company acknowledges.
What readers can do now
- If you spec AI servers, ask about MRDIMM support in the CPU platform — main-memory bandwidth is now a first-class inference metric, not an afterthought.
- If you follow China semiconductors, watch interface chips, the quiet layer between logic and memory that often localizes ahead of the memory itself.
- If you invest, read gross-margin trends — Montage's ~69% margin signals pricing power, but customer concentration is the risk to monitor.
Honest limitations
Revenue (5.139B RMB, +53.4%), the 9,200 MT/s sixth-gen RCD sampling, MRCD/MDB Gen1/Gen2 speeds, and the 69.3% first-half margin with 538M RMB new-product revenue come from Chinese financial-media reports (21st Century, NetEase) citing company filings and investor events. The "one of only two Gen1 suppliers" claim appears in both company and Baidu entries. The MRDIMM throughput and CXL TCO numbers are Montage's own published benchmarks and are flagged as vendor figures. I have not independently benchmarked any product, and I avoid implying Montage competes with memory makers — it supplies the interface, not the DRAM.