For twenty years, a laptop or server chip has meant one of two names: x86 or Arm. A third contender is quietly getting invited to the party — and the invitation this time was written by Canonical, the company behind Ubuntu.
The chip comes from a Hangzhou startup called SpacemiT (进迭时空), and its significance is less about raw speed than about which instruction set (指令集) the next wave of Chinese AI hardware is willing to bet on.
The third instruction set knocks
RISC-V is an open-standard architecture: unlike x86 (Intel, AMD) or Arm, nobody charges a license fee or controls the roadmap. That openness has made it a favorite for embedded and IoT chips. What is new is RISC-V trying to grow up — into AI-capable CPUs that can run mainstream operating systems and serious models.
SpacemiT, founded in November 2021, is one of the Chinese firms pushing hardest in that direction. Its earlier Key Stone K1 was billed as the world's first 8-core RISC-V AI CPU when it launched in April 2024 and entered mass production weeks later. The company open-sourced its custom AI extension instructions and software stack — a deliberate move to seed an ecosystem rather than ship a black box.
By mid-2025, cumulative K1 shipments were reported above 100,000 units, embedded in power-inspection robots and telecom base-station edge gateways, and in low-cost single-board computers from partners. That is a modest volume, but it proves the silicon is real and shipping, not a press render.
What SpacemiT actually shipped
The newer K3 is the part drawing international attention. According to Canonical's own blog and German technology outlet heise online, the K3 is an 8-core RISC-V SoC:
- Eight proprietary X100 RISC-V cores running up to 2.4 GHz.
- Eight AI cores delivering up to 60 TOPS of on-chip inference.
- Support for up to 32 GB of LPDDR5 memory.
- A thermal envelope around 15–25 watts, small enough for fan-cooled edge boxes and even laptop mainboards.
SpacemiT rates the K3 for AI models "in the 30B-A3B class" — the emerging mixture-of-experts style where a large parameter count hides a much smaller active footprint. That framing matters: it signals the chip is aimed at the new generation of efficient large models (大模型) rather than last decade's dense networks.
Why Ubuntu is the real milestone
Specs are easy; software is the moat. The headline is that Ubuntu 26.04 LTS — a mainstream, globally used Linux distribution — is being enabled on the K3, and Ubuntu 24.04 LTS on the older K1. Canonical adopted the RVA23 profile (a 2024-defined baseline of mandatory RISC-V features) as its standard, and the K3 is among the first RVA23-compliant platforms to get that level of support.
This is the moment RISC-V stops being "a thing you cross-compile for" and starts being "a thing you install Ubuntu on." Independent coverage confirms it is not vaporware: heise online reviewed development boards, and Lunar Computer reported a Framework Laptop 13 mainboard built around the K3 with pre-orders scheduled to ship in 2026. When a Western modular-laptop community can buy a RISC-V board off the shelf, the ecosystem argument gets harder to dismiss.
The China angle: an open-standard hedge
The strategic logic is straightforward. x86 is controlled by US firms; Arm licenses are governed by a UK/Japanese-owned company with export-sensitive terms. RISC-V, being open, offers China a path to build capable CPUs without asking permission — a structural hedge against license and export risk.
That hedge has now reached policy weight. China's latest five-year planning framework has explicitly named RISC-V for research and industrialization, signaling state backing for the architecture as a strategic alternative. Industry analysts forecast the domestic RISC-V chip market to multiply several-fold by the end of the decade as edge AI and embodied-intelligence devices proliferate.
For SpacemiT, the bet is that "AI CPU" — a RISC-V core with homogeneous AI acceleration baked in — is the right primitive for robots, edge security, and industrial vision, not just a cheap embedded controller.
From edge box to server ambition
The company has also reported raising a several-hundred-million-yuan (≈ US$40M+ / HK$300M+) Series A+ round led by a Hong Kong fund, earmarked for high-performance and server-class RISC-V CPU development. That is the tell: SpacemiT is not content with toasters and gateways. It is building toward server-grade parts where RISC-V has historically been weakest.
The honest gap is performance and software maturity. A 60-TOPS edge SoC is not a data-center training engine, and the RISC-V software library, while improving fast, still lags x86 and Arm for mainstream enterprise workloads. The server dream depends on whether RVA23-class hardware plus Ubuntu-level support can attract enough developers to close that gap.
What readers can do now
- If you build edge AI products, evaluate an RVA23 RISC-V board (K3-class) for always-on, low-power inference where x86/Arm licensing or power budgets are constraints.
- If you follow China's semiconductor autonomy, track RISC-V server-CPU progress and five-year-plan funding as a gauge of how serious the open-standard hedge has become.
- If you develop software, start testing your stack on RVA23 hardware now; the Ubuntu enablement means porting costs are lower than they were even a year ago.
Honest limitations
Performance figures (8 cores, 60 TOPS, 2.4 GHz, 15–25W) are drawn from Canonical's blog, heise online, and OMG! Ubuntu; we did not independently benchmark the K3. The "100,000+ K1 shipments" and the Series A+ funding amount are company- or Chinese-media-reported and unaudited; the funding range is a qualitative conversion of a "several-hundred-million-yuan" figure (≈ ¥7.1 = US$1; ≈ ¥1 = HK$1.1) and should not be read as a precise number. The policy claim about RISC-V in China's five-year plan is sourced from Chinese industry press and not independently verified here. RISC-V's server-grade competitiveness remains unproven at scale; this article covers SpacemiT specifically and does not benchmark it against x86 or Arm server parts.