Key takeaways
- Changxin Technology announced on 2026-10-31, during its Q3 earnings call, that engineering samples of its sixth-generation DRAM process platform had completed validation.
- This platform is explicitly based on the 4F² vertical-channel (vertical沟道) DRAM architecture—a structural departure from conventional planar designs.
- It marks the first time Changxin has publicly identified its sixth-gen platform as built on the 4F² architecture.
- The announcement was reported by cnBeta on 2026-10-31, citing the company’s official earnings communication.
- No yield data, production timeline, capacity targets, or customer engagements were disclosed in the source report.
What happened
On October 31, 2026, Changxin Technology confirmed during its quarterly earnings exchange that engineering samples for its sixth-generation DRAM process technology platform had successfully undergone validation. According to cnBeta’s contemporaneous report, the company emphasized that this platform rests on the 4F² vertical-channel architecture, a design approach that stacks memory cells vertically to improve density and reduce footprint per bit. The term “vertical沟道” (vertical channel) refers to transistor channels oriented perpendicular to the silicon substrate, enabling tighter cell scaling than traditional lateral-channel layouts used in most mainstream DRAM. The phrase “4F²” denotes a theoretical minimum cell area of four times the feature size squared—an industry-standard metric reflecting layout efficiency.
Changxin did not disclose whether these engineering samples were fabricated at its own 12-inch fab in Hefei or via external foundry support. Nor did it specify whether the samples meet standards for latency, power, or endurance—key benchmarks required before volume qualification. The company also offered no details about lithography nodes, materials, or whether the architecture relies on through-silicon vias (TSVs) or monolithic 3D stacking. These omissions are standard at the engineering sample stage: validation confirms functional operation—not manufacturability or reliability.
Why it matters
This milestone signals a strategic pivot toward architectural innovation rather than incremental node shrinkage—a path increasingly necessary for Chinese memory makers under sustained export controls on advanced lithography tools. Since 2022, ASML’s export restrictions have blocked access to deep ultraviolet (DUV) immersion scanners with numerical apertures above 0.85 and all extreme ultraviolet (EUV) systems, constraining sub-20 nm patterning capability. In that context, vertical-channel designs offer a route to higher density without relying solely on finer line widths. Unlike logic chips—where EUV enables single-exposure patterning below 7 nm—DRAM scaling has long depended on complex multi-patterning and capacitor stacking tricks. The 4F² vertical-channel approach aligns with that tradition but pushes further into 3D integration, potentially easing reliance on cutting-edge optical lithography.
For China’s domestic AI hardware stack, DRAM advancement carries direct implications. AI training clusters demand high-bandwidth, low-latency memory; current domestic alternatives trail global leaders in bandwidth-per-watt and capacity per module. A validated 4F² platform—if matured into volume production—could enable next-generation server DIMMs or stacked modules tailored for domestic AI accelerators. Yet significant gaps remain: Changxin has not announced tape-outs of stacked derivatives, nor partnerships with AI chip designers for co-optimization. Its prior generations (e.g., 19 nm-class DDR4) entered mass production only after ~3 years of engineering validation—suggesting any sixth-gen volume ramp remains multiple years out.
What remains unknown—and what readers should watch—is whether Changxin can translate this architectural validation into stable, high-yield manufacturing; whether it will adopt proprietary or licensed IP for the vertical-channel control logic; and whether China’s equipment ecosystem can support the required anisotropic etching and epitaxial regrowth steps. Until those questions are answered in official disclosures or third-party teardowns, the 4F² announcement stands as a credible technical inflection point—not yet a production reality.
Sources: cnBeta，2026-10-31 "Changxin Tech completes engineering samples of sixth-gen DRAM on 4F² architecture" — original report