The risk of a one-company strategy is that it is one company. For most of the last three years, China's domestic AI compute story was essentially Huawei's Ascend story. In 2026, a genuine second tier emerged — and it is starting to show up in financial statements.
Key takeaways
- Cambricon: its new flagship cloud AI chip Siyuan 690 entered mass production in early 2026 — dual-die packaging, over 700 TFLOPS FP16, 196 GB HBM3. First-half 2026 revenue reached 5.996 billion yuan (+108% year on year) with net profit of 2.311 billion yuan (+123%).
- Hygon Information: China's only company mass-producing both x86 CPUs and AI acceleration DCUs. Its Deep Computing No. 3 DCU uses a GPGPU architecture compatible with the CUDA ecosystem, with over 99% operator coverage, supporting hundred-billion-parameter model training and inference. Hygon CPU + DCU have been deployed in a 100,000-card AI cluster.
- Moore Threads: first-half 2026 revenue of 1.736 billion yuan (+147.42%), launching an H-share listing in Hong Kong in August 2026.
- MetaX: its first fully domestic general-purpose GPU, the Xiyun C600, was slated for mass production in the first half of 2026, with the next-generation C700 aimed at H100-class performance.
- Market structure: China's domestic share of AI accelerators has risen from a pre-sanctions NVIDIA monopoly of roughly 95% to about 41%.
The shape of the market
Third-party estimates for 2025 domestic cloud AI accelerator shipments illustrate how the tier formed:
| Company | Approx. shipments | Domestic position |
|---|---|---|
| Huawei Ascend | ~812,000 | No. 1 domestic (~half of all domestic supply) |
| Alibaba T-Head | ~265,000 | No. 2 domestic |
| Baidu Kunlun | ~116,000 | No. 3 (tied) |
| Cambricon | ~116,000 | No. 3 (tied) |
| Hygon Information | ~82,500 | Top five |
The strategic significance is less the ranking than the diversity. A second tier means second sourcing: if one supply line is constrained, others can absorb demand. It also creates competitive pressure on software compatibility and price, which is exactly what a domestic ecosystem needs.
Two different strategies
The second tier is not simply copying Huawei. Two distinct approaches are visible.
Compatibility-first. Hygon bet on a GPGPU architecture that runs existing CUDA-era workloads, with operator coverage above 99%. The wager is that the fastest way to displace incumbent hardware is to make migration invisible. Its C86 server CPUs add hardware security engines — national cryptography, TEE confidential computing, trusted computing — which matters for government and operator procurement. In June 2026, the first AI4E thousand-card engineering compute cluster built entirely on domestic Hygon DCUs went live at Tongji University, using a supercomputing–AI converged architecture.
Architecture-first. Cambricon and MetaX went at raw specification. The Siyuan 690's dual-die design with 196 GB of HBM3 is a statement about memory capacity, which is the binding constraint in inference. MetaX's roadmap targets H100-class performance outright.
Both are legitimate. Compatibility wins migrations; performance wins greenfield deployments.
The real bottleneck
Every serious analysis of Chinese AI silicon converges on the same three constraints: wafer fabrication, HBM memory, and advanced packaging. Not design. Not capital. Not even software, which has improved faster than expected — CANN is now fully open-sourced, and models ship with Day-0 adaptation across nine domestic chips.
That is why the most advanced parts are still allocated first to national supercomputing centres and the largest internet companies, and why the highest-volume domestic parts serve inference, where the requirements are more forgiving.
The consensus view is that supply constraints begin to ease from 2027, as domestic HBM3 production ramps and advanced packaging and leading-edge capacity expand. If that happens on schedule, the second tier's growth rates are likely to be the leading indicator.
The honest scoreboard
China's domestic accelerators are competitive but not equivalent. Independent assessments have put single-card performance of the 910C generation at a fraction of the leading Western part, which is precisely why the supernode strategy exists. The sector's own analysts describe the competition as having moved "from single cards to supernode systems," where system-level capability compensates for a per-chip gap.
That is a coherent strategy, and the financial results suggest it is working commercially. But it is a strategy built on systems engineering and manufacturing scale — not on having the best transistor.
Shipment and market-share figures are third-party estimates for 2025; financial figures as disclosed by listed companies in 2026.