A data-center operator in Shenzhen opens a new rack and finds no Nvidia logo on the accelerators bolted inside.
Instead, 384 Huawei chips sit wired together, built to do one thing the export bans made urgent.
The real question is no longer whether a single Chinese chip can match a top Nvidia part — it is whether enough of them, linked tightly, can.
Key takeaways
- Huawei's Ascend 910B and 910C are the backbone of China's push to run large models (大模型) without restricted Nvidia GPUs.
- The 910C is essentially two 910B compute dies packaged together, built on SMIC's 7nm-class N+2 process.
- Independent testing by the DeepSeek team put the 910C at roughly 60% of Nvidia's H100 inference performance — a gap Huawei answers with scale, not per-chip speed.
- Huawei's CloudMatrix 384 cluster wraps 384 of these chips into one supernode, trading higher power use for aggregate throughput.
- The soft underbelly is the software stack: Huawei's CANN and MindSpore remain far smaller than Nvidia's CUDA ecosystem.
From a banned GPU to a homegrown alternative
When the US government barred the sale of Nvidia's H100 to China in 2022, it removed the chip that most Chinese AI labs had planned their roadmaps around. Huawei's answer was the Ascend (昇腾) line, designed inside its HiSilicon unit and fabricated domestically.
The earlier Ascend 910B became China's most widely deployed stand-in for Nvidia's data-center GPUs across 2023 and 2024. Built on a 7nm-class SMIC process using the Da Vinci (达芬奇) architecture, it is rated at roughly 320 TFLOPS in FP16 and 640 TOPS in INT8 at about 310 watts. At a 2024 industry conference, a Huawei executive said the 910B reaches about 80% of Nvidia's A100 efficiency when training large language models and edges ahead of the A100 in some benchmark runs. Those figures come from Huawei's own claims relayed through trade press, not an independent datasheet — Huawei has never published a full 910B specification.
What made the 910B matter was volume. Companies such as Baidu, ByteDance, and iFlytek (科大讯飞) adopted it under supply pressure, anchoring the first wave of Chinese AI clusters built without A100 or H100 silicon.
The 910C: two chips where one used to be
The Ascend 910C, which began mass shipments in May 2025, is best understood as an evolution rather than a breakthrough. It packages two 910B dies into a single part on SMIC's second-generation 7nm-class process, known as N+2. Because the United States cut Huawei off from TSMC in 2020, this silicon can only be made with older deep-ultraviolet (DUV) lithography and multi-patterning — no extreme-ultraviolet (EUV) equipment.
That constraint shows up in the numbers researchers quote. The DeepSeek team reported that the 910C delivers about 60% of the H100's inference performance. It still trails Nvidia's newer Blackwell-class chips. But the 910C's significance is strategic: it is the part Huawei can actually mass-produce inside China, and industry analysts estimated Huawei aimed to ship on the order of hundreds of thousands of Ascend 910B and 910C units during 2025.
Yield is the quiet story behind that ambition. Industry reporting from the Financial Times and DIGITIMES Asia put the 910C's manufacturing yield near 40% in 2025, up from roughly 20% a year earlier — a level that finally let the Ascend production line turn profitable, yet still well below the yields TSMC achieves on equivalent nodes.
When one chip is slower, use 384
Huawei's most interesting move is architectural. Rather than chase a faster single chip, it links many slower ones.
The CloudMatrix 384, first delivered to customers in late April 2025, is a supernode built from 384 Ascend 910C NPUs across 16 racks. Huawei states the system delivers about 300 PFLOPS of dense BF16 compute. Independent technical analysis notes the cluster performs better than Nvidia's 72-chip GB200 NVL72 on some aggregate measures, while consuming significantly more power — roughly 2.3 times lower performance per watt. The system has been reported to sell for around RMB 60 million (about US$8.2 million / HK$64 million) per set.
The trade is explicit: five times as many Ascend chips as Blackwell chips in a comparable footprint, enough to compensate for each chip being only about a third as fast. For Chinese buyers locked out of the newest Nvidia hardware, that math is acceptable.
According to Li An, chief scientist at BrainNet (脑机网), the durable lesson is that China is optimizing for "available at scale" rather than "fastest on paper," and that clusters, not single chips, are where the real engineering is happening.
The software wall
All of this silicon is only as useful as the code that runs on it. Nvidia's moat is less its hardware than CUDA, the software layer almost every AI framework assumes. Huawei counters with CANN (Compute Architecture for Neural Networks) and the MindSpore framework, and it has courted developers by improving PyTorch compatibility. The ecosystem is growing, but it is still a fraction of CUDA's reach, and porting mature workloads off Nvidia remains real work.
For global readers, the takeaway is not "China caught Nvidia." It is that a major economy is building a parallel, self-contained AI-compute stack — and learning to win on deployment volume when it cannot win on per-chip specs.
Honest limitations
This article relies on a mix of vendor statements, trade-press reporting, and analyst estimates; Huawei does not publish full Ascend datasheets, so per-chip specs are best read as informed approximations. Yield and shipment figures come from secondary industry reporting rather than audited Huawei disclosures. The CloudMatrix 384 performance claims are Huawei's own and have not been independently benchmarked end-to-end by neutral labs. Coverage here centers on training and inference accelerators and does not address Huawei's edge or automotive chips, its networking silicon, or the separate question of end-user software migration costs.
What readers can do now
- Track the Ascend 910C's real-world adoption through cloud-price and availability signals from Chinese hyperscalers, not just spec sheets — deployment at scale is the real test.
- If you build on AI infrastructure, prototype one workload on a non-CUDA stack (CANN or another accelerator) to learn where vendor lock-in actually hurts you.
- Watch SMIC yield and HBM supply reports as the leading indicators of how fast the domestic cluster approach can keep scaling.