---
title: "China's memory maker just handed Huawei a sample of the one chip AI can't live without"
date: 2026-10-01
category: Chips & Compute
site: NeuroAI
canonical: https://neuroai.site/a/na-chips-cxmt-hbm3-huawei
language: en
---

# China's memory maker just handed Huawei a sample of the one chip AI can't live without

> ChangXin Memory (长鑫存储, CXMT) has reportedly shipped 16nm HBM3 samples to Huawei — a small but symbolic step toward closing the high-bandwidth-memory gap that has throttled China's AI accelerators.

A modern AI accelerator is only as fast as the memory bolted next to it. For China's chip designers, that memory — high-bandwidth memory, or HBM — has been the missing piece, locked behind export controls and a near-total foreign monopoly. That may be starting to change, one sample at a time.

In October 2025, the Taiwan-based supply-chain publication DigiTimes reported that ChangXin Memory Technologies (长鑫存储, CXMT), China's largest DRAM maker, had delivered **16nm HBM3 samples to Huawei and its partners**. It is a modest milestone — samples, not volume — but it targets the single most bottlenecked component in the domestic AI stack.

## Why HBM is the real bottleneck

Graphics and AI chips move enormous tensors, but the chip itself is idle while data crawls in from ordinary memory. HBM stacks DRAM vertically and sits next to the compute die, delivering the bandwidth that training and inference actually need. Today that market is dominated by SK Hynix, Samsung and Micron.

US export controls have restricted China's access to advanced HBM, leaving domestic AI-chip makers such as Huawei and Cambricon (寒武纪) leaning on pre-control inventory. A home-grown HBM supply is therefore not a nice-to-have; it is the difference between a domestic AI cluster that scales and one that stalls.

## What CXMT reportedly did

Per DigiTimes, the HBM3 samples are a *precursor* to large-scale manufacturing planned for 2026. The same reporting lays out the rest of the roadmap:

- **HBM3E** is targeted for **2027** — roughly when HBM4 becomes the global mainstream standard.

- CXMT is still estimated to be **three to four years behind** the leading memory makers on HBM.

- Its DRAM capacity is projected to reach **230,000–280,000 wafers per month** by the end of 2025.

- DDR5 yield is claimed to be around **80%**, approaching the levels of top memory firms.

Separately, CXMT has moved more solidly into the public record on mainstream mobile AI memory: it began mass-producing **LPDDR5X** in May 2025, at 8,533 and 9,600 Mbps, with 10,667 Mbps parts in customer sampling — speeds aimed at on-device AI in phones and laptops.

## The strategic read

If the HBM3 sample report holds up, it means China can begin to assemble a more complete *domestic* AI supply chain — compute (Huawei Ascend, Cambricon) plus the high-bandwidth memory those chips crave. That is the "full cycle" Beijing has been chasing since 2020.

It also helps explain why CXMT is preparing to become China's first publicly listed memory-chip maker. Reporting indicates it passed the counselling-acceptance stage with regulators and was eyeing a first-quarter 2026 IPO, riding AI-driven memory demand.

## The memory supercycle behind the rush

HBM is not a niche part. As AI training clusters grow, memory bandwidth and capacity have become the binding constraint on how much useful compute a chip actually delivers. Global memory makers and analysts have described a memory "supercycle" driven by AI demand, with HBM supply tight well into 2026. For Chinese AI-chip designers, being cut off from leading HBM means their accelerators — however clever the logic die — sit next to memory that is slower, scarcer or simply unavailable. That is why even a trailing-edge domestic HBM is strategically loaded: it de-risks the entire stack, not just one product, and it lets Huawei, Cambricon (寒武纪) and others plan multi-year roadmaps without a foreign-supplied wildcard.

## How far behind is "behind"?

Honesty matters here. Three to four years is a large gap in a market moving as fast as HBM. SK Hynix and Samsung are already shipping HBM3E and preparing HBM4, while CXMT's HBM3 samples are, by definition, pre-production. Even at volume, CXMT's HBM will likely trail on bandwidth, stack height and power efficiency for years.

But for a country cut off from the leading edge, "good enough and made at home" is a strategic asset, not a consolation prize.

## Honest limitations

- The HBM3 sample delivery is **reported by DigiTimes** and has not been officially confirmed by CXMT or Huawei; treat it as well-sourced supply-chain reporting, not a corporate announcement.

- Wafer-capacity, yield and "three to four years behind" figures all trace back to the same DigiTimes reporting and its reposts; we could not independently verify them against CXMT filings.

- Specific financial or revenue numbers for CXMT circulating in some secondary outlets were not used here because they could not be confirmed against a primary source.

- Mass-production timing (2026 for HBM3, 2027 for HBM3E) is aspirational and dependent on packaging, yield and equipment access that remain uncertain under continuing export controls.

## What readers can do now

- **Track the primary source, not the headline** — watch for an official CXMT statement or a CSRC filing before treating HBM3 as "in production."

- **Watch the packaging problem** — HBM lives or dies on advanced packaging (through-silicon vias, stacked dies); follow whether CXMT's Shanghai packaging build-out actually comes online.

- **Benchmark the gap** — compare SK Hynix/Samsung HBM3E specs against whatever CXMT eventually ships; the years-behind estimate is the number that tells you how real the autonomy is.

---

Published by NeuroAI (https://neuroai.site/) — https://neuroai.site/a/na-chips-cxmt-hbm3-huawei
Free to quote with attribution and a link to the original.
